Commodore 128 Machine Hub

C128, C128D & C128DCR workbench reference — dual-CPU Z80A/8502 boot diagnostics, 80-column RGBI VDC & 64K VRAM upgrade, 5-pin square DIN PSU pinouts, and 1571 drive care.

C128 5-Pin Square DIN PSU & C128D Internal Supply Check

Unlike the C64's epoxy-potted "brick of death", the flat C128's heavy external power supply uses a much safer switching/thyristor +5 V stage rated at 4.3 A (+5 V DC) and 1.0 A (9 V AC) via a unique 5-pin Square DIN Power Connector. However, after 40 years the internal Crowbar SCR (thyristor), filter electrolytics, and bridge rectifier degrade — and on the C128D / C128DCR, the internal PSU contains RIFA-style mains filter caps and aging 5 V/12 V regulators that must be inspected before powering on!

1 5-Pin Square DIN Pinout (Flat C128)

Viewed looking into the male plug on the PSU cable (or solder side of the female motherboard socket):

Square DIN PinSignalSpec & Tolerance
Pin 1 (Top-Left)+5 V DC4.90–5.15 V DC @ 4.3 A
Pin 2 (Bottom-Left)GND (0 V)DC Digital Return Ground
Pin 3 (Center)9 V AC (Line 1)9.0–10.5 V AC @ 1.0 A (TOD clock, SID/VIC +12V VR1 & User Port)
Pin 4 (Bottom-Right)NC (Key / Shield)Unconnected / Shield
Pin 5 (Top-Right)9 V AC (Line 2)9 V AC Return (fused inside PSU)

2 Why Missing 9V AC Stops the C128

  • Internal +12 V Regulator (VR1, 7812): On the flat C128, the 9 V AC rail is voltage-doubled and rectified on the motherboard to feed a 7812 (+12 V) regulator that powers the 6581 SID, the 8502/VIC-IIe clock circuitry, and the Z80A clock buffer!
  • Blown 9V AC Fuse = Dead Machine: If the internal 1.6 A glass fuse inside the PSU brick blows on the 9 V AC winding, the C128's red power LED will still light up (from +5 V), but the machine will sit on a completely black screen with no audio or clock.
  • Always measure both +5 V DC and 9 V AC before tearing down the motherboard!

3 C128D & C128DCR Internal PSU Notes

  • C128D (Plastic, European): Contains a noisy 60 mm cooling fan and an internal switching PSU generating +5 V DC, +12 V DC (for the 1571 floppy drive motor & SID), and 9 V AC. Swap the noisy fan for a quiet 12 V Noctua/Sunon equivalent.
  • C128DCR (Metal Case): Uses an open-frame switching PSU (with no fan installed from factory!). Inspect the X2 mains filter capacitor for cracks and recap the secondary 105 °C low-ESR smoothing caps to prevent +5 V/12 V drift during 1571 disk seeks.

Multi-Mode Architecture & Model Selector

Explore Bil Herd's three-in-one computer architecture and compare the Flat C128, C128D (Plastic), and C128DCR (Metal) hardware revisions.

Mode 1 • Default Boot

C128 Native Mode (BASIC 7.0)

Runs on the MOS 8502 CPU at 1.02 MHz (40-col VIC-IIe active) or 2.04 MHz FAST mode (when the 40-column screen is blanked and using the 80-column MOS 8563/8568 VDC). Uses the MOS 8722 MMU to bank-switch 128 KB of system RAM (two 64K banks) plus 64 KB of ROM (BASIC 7.0, Kernal, Editor, Character, and internal/external Function ROMs).

Mode 2 • Hold C= Key or GO 64

C64 Compatibility Mode

Entered by holding the C= (Commodore) key at power-on, typing GO 64 in BASIC 7.0, or inserting a cartridge that pulls /GAME or /EXROM low. The 8722 MMU locks memory to Bank 0, maps in the onboard 16 KB C64 BASIC 2.0 + Kernal ROM, disables the 2 MHz clock and keypad/VDC registers, and achieves near-100% hardware-level C64 compatibility.

Mode 3 • Z80A Co-Processor

CP/M Plus (3.0) Mode

Wait — the Zilog Z80A is actually the FIRST CPU to wake up on every C128 boot! At power-on, the Z80A runs for ~1 millisecond to check for a C= keypress or a CP/M boot sector before handing the bus over to the 8502. When booting a CP/M 3.0 disk, the Z80A takes over at 4 MHz (effective 2 MHz bus speed) while calling the 8502 for low-level I/O when needed.

Commodore 128 Flat ("Wedge") ASSY 310379 • 1985–1989

The classic single-piece desktop console with built-in numeric keypad, dedicated cursor keys, 40/80 DISPLAY locking switch, and full heavy RF shielding plate that doubles as the heatsink for the major MOS VLSI chips.

Key ICs & Board Designators

  • U6 (Main CPU): MOS 8502 @ 1.02 MHz / 2.04 MHz
  • U10 (CP/M CPU): Zilog / SGS Z80A @ 4.00 MHz (2 MHz effective)
  • U7 (MMU): MOS 8722 Memory Management Unit (48-pin DIP)
  • U11 (PLA): MOS 8721 Programmable Logic Array (48-pin DIP)
  • U21 (40-Col Video): MOS 8564 (NTSC) / 8566 (PAL) VIC-IIe (48-pin DIP)
  • U22 (80-Col Video): MOS 8563R7A / R8 / R9 VDC (48-pin DIP) + 16 KB VRAM (2× 4416 at U23/U25)
  • U5 (Audio): MOS 6581 / 6581R4 SID (12 V filter)
  • U1 & U4 (I/O): 2× MOS 6526A-1 (2 MHz-rated) CIA chips
  • U38–U53 (System RAM): 16× 4164 (64K×1) DRAMs (Bank 0 = U38–U45, Bank 1 = U46–U53)
  • U32–U36 (ROMs): Four 16 KB ROM sockets (U32–U35) + empty U36 Function ROM socket

Flat C128 Bench & Capacitor Notes

Ref / AreaSpecNotes
RF Shield Heatsink FingersSpring metal tabsNever run a Flat C128 for extended periods with the metal RF shield removed unless you attach stick-on aluminium heatsinks to U21 (VIC-IIe), U22 (8563 VDC), U5 (6581 SID), U7 (8722 MMU), and U11 (8721 PLA)!
C106, C107 (Power Input)2200 μF 16 V, 470 μF 25 VMain +5 V and 9 V AC/12 V rectifier filter electrolytics near VR1 (7812).
U28 (8701 Clock Gen)MOS 8701 (DIP-16)Generates dot clock and colour clock for the VIC-IIe. Shared part with C64 ASSY 250425/250466.

6526A-1 Speed Grade: Notice the -1 (2 MHz) rating on the C128's 6526A CIA chips — because the C128 supports fast serial IEC burst transfers, standard 1 MHz 6526 pulls from early C64s may occasionally drop bits in fast burst mode, though they work fine for standard diagnostics.

Diagnostic Checklist & Common Faults

Tracing the Z80A-to-8502 boot handoff, 8722 MMU / 8721 PLA failures, and dual-monitor video faults.

⚙

Black Screen & Dual-CPU Boot Handoff Tree

The #1 mistake when repairing a dead C128 is forgetting that if the Z80A CPU (U10) is dead or lacks its clock, the 8502 CPU (U6) will NEVER start — not even in C64 mode!

Step-by-Step Boot Signal Trace

  1. 1. Verify +5 V and +12 V (VR1 output): Without +12 V from VR1 (derived from the 9 V AC PSU pins), the clock circuitry and Z80A clock driver cannot oscillate.
  2. 2. Check Z80A (U10) First:
    • At power-on, the 8722 MMU asserts Z80EN so the Z80A executes the boot code at $0000 in the Kernal ROM.
    • Probe Z80A Pin 6 (CLK) for a 4 MHz gated clock and Pin 26 (/RESET) for a clean low-to-high transition.
    • A dead Z80A, cracked Z80A socket, or failed 7406/74LS74 clock buffer leaves the 8502 permanently held off the bus (AEC low).
  3. 3. Check the 8722 MMU (U7) & 8721 PLA (U11):
    • Probe 8502 Pin 1 (Φ0 Clock In) for 1.02 MHz and Pin 38 (AEC). After ~1 ms, the Z80A writes to MMU register $D505 to enable the 8502 and put itself to sleep (/BUSRQ low).
    • Reseat the 48-pin sockets for U7 (MMU) and U11 (PLA) — oxidised single-wipe pins on U7/U11 cause 50% of intermittent C128 black screens!
  4. 4. Hold Down the STOP Key on Power-Up: Holding STOP during cold boot forces the C128 into the built-in Machine Language Monitor ($B000). If the Monitor appears on screen, your hardware and Kernal ROM are working, and only the BASIC 7.0 ROM (U32/U33) or zero-page RAM is faulty!
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Dual Video Troubleshooting (VIC-IIe 40-Col vs VDC 80-Col)

Because the C128 has two completely independent video subsystems, testing both the 8-pin DIN (40-col) and DB9 (80-col) ports immediately cuts your troubleshooting time in half!

40-Col (VIC-IIe)80-Col (VDC)Diagnosis & Fault Location
Dead / Black Working!
(Press 40/80 + Reset)
CPU, MMU, PLA, RAM, and ROMs are 100% healthy! Fault is isolated to U21 (8564/8566 VIC-IIe), U28 (8701 clock gen), or the RF/A/V modulator path.
Working! Dead / Garbled Main system is healthy! Fault is isolated to U22 (8563/8568 VDC), its 16 MHz oscillator circuit, or the two dedicated VDC RAM chips (U23 & U25, 4416/4464).
Garbage Chars Working! Bad Character ROM (U18), bad CIA#2 (U4, VIC bank select VA14/VA15), or bad Bank 0 DRAM (U38–U45).
Out of Memory / Corrupt Out of Memory Faulty System DRAM in Bank 0 (U38–U45) or Bank 1 (U46–U53), or failed 74LS257 multiplexers (U14/U15).

System RAM Bit-to-IC Map (Flat C128 ASSY 310379):
• Bank 0 (Lower 64K — C64 & C128 Program RAM): Bit 0 = U38, Bit 1 = U39, Bit 2 = U40, Bit 3 = U41, Bit 4 = U42, Bit 5 = U43, Bit 6 = U44, Bit 7 = U45.
• Bank 1 (Upper 64K — C128 Variables RAM): Bit 0 = U46, Bit 1 = U47, Bit 2 = U48, Bit 3 = U49, Bit 4 = U50, Bit 5 = U51, Bit 6 = U52, Bit 7 = U53.

16K to 64K VDC Video RAM Upgrade Guide

Unlock 640×480 interlaced 80-column high-resolution colour graphics, Basic8, and GEOS 128 80-column desktop on Flat C128 & C128D Plastic boards.

1 How the Upgrade Works

The MOS 8563 VDC on the Flat C128 and C128D Plastic has its own private video memory bus (completely separate from the 128 KB system RAM) populated from the factory with two 4416 (16K×4, 18-pin DIP) DRAM chips at U23 and U25 (giving 16 KB total VRAM). Fortunately, Commodore routed all the address lines on the PCB for 4464 (64K×4, 18-pin DIP) DRAMs — making this a clean, zero-wire swap!

ComponentStock 16K VDCUpgraded 64K VDC
U23 & U252× 4416 (16K×4, DIP-18)2× 4464 / TMS4464 / MB81464 (64K×4, 120 ns or faster, DIP-18)
VDC Register 28 Bit 40 (16K Addressing Mode)1 (64K Addressing Mode — set via software or BASIC poke)

2 Installation & BASIC Verification

  1. Desolder U23 & U25: Carefully desolder the two 18-pin 4416 DRAMs located directly beside the 8563 VDC (U22) using a vacuum desoldering pump or low-melt alloy.
  2. Fit Dual-Wipe / Turned-Pin 18-Pin Sockets: Solder two high-quality 18-pin IC sockets at U23 and U25, clean off flux with IPA, and insert two matching 4464 (64K×4) DRAMs (ensure the Pin 1 notch faces the same direction as the silkscreen!).
  3. Test in BASIC 7.0: Switch to 80-column display mode and run this 3-line test to enable 64K VDC addressing (Register 28) and verify that upper VRAM retains data without mirroring into lower VRAM:
    10 SYS DEC("CDCC"), 63, 28 : REM SET VDC TO 64K MODE
    20 SYS DEC("CDCC"), 85, 18 : SYS DEC("CDCC"), 0, 19
    30 SYS DEC("CDCC"), 42, 31 : PRINT "64K VDC UPGRADE OK!"

Video, Drive & Serial Port Pinouts

DB9 80-column RGBI + Monochome composite, 8-pin DIN 40-column S-Video/Composite, Burst-Mode IEC, and internal 1571 drive headers.

80-Column VDC RGBI Output DB9 Female

See also our dedicated 5-Pin Square DIN Power, 8-Pin DIN 40-Column A/V, Fast Burst IEC Serial, and 44-Pin Cartridge Slot pages. Outputs 15.7 kHz digital TTL RGBI (16 colours, identical to IBM CGA with hardware brown fix inside Commodore 1084/1902A monitors) PLUS a convenient analog Monochrome Composite output on Pin 7 that plugs straight into any standard yellow RCA TV input!

DB9 PinSignalLevel & Converter Notes
1GNDGround return
2GNDGround return
3RED5 V TTL Digital Red
4GREEN5 V TTL Digital Green
5BLUE5 V TTL Digital Blue
6INTENSITY (I)5 V TTL Brightness bit
7MONO VIDEO75 Ω Monochrome Luma+Sync! Wire Pin 7 + Pin 1 directly to an RCA plug for instant 80-col greyscale on any TV!
8HSYNC5 V TTL Horizontal Sync (~15.7 kHz)
9VSYNC5 V TTL Vertical Sync (50/60 Hz)

Converting Digital RGBI to SCART / HDMI: You cannot wire TTL RGBI (0–5 V) straight to an analog 0.7 V SCART TV without a resistor/DAC network. For pixel-perfect HDMI, use an RGBtoHDMI (with 12-bit/RGBI hat); for analog SCART/OSSC/RetroTINK, use a dedicated C128 RGBI-to-RGBS DAC adapter (which also implements the CGA dark-yellow → brown decoder).

40-Column VIC-IIe 8-Pin DIN A/V Port 8-Pin DIN (262° Horseshoe)

Identical to the late C64 / C64C 8-pin horseshoe DIN except Pin 7 carries a 2 MHz clock on some boards — always verify your S-Video cable uses Pin 1 (Luma) and Pin 6 (Chroma) with a 300 Ω series resistor on Chroma!

DIN PinSignalCable Target
1Luminance / Sync (Y)S-Video Y (Pin 3)
2GNDVideo & Audio Ground
3Audio Out (SID)White/Red RCA Audio (Mono)
4Composite Video OutYellow RCA Composite Video
5Audio In (to SID Ext)External audio input into SID filter
6Chrominance (C)S-Video C (Pin 4) via 300 Ω series resistor
7NC / ClockLeave unconnected in A/V cables
8NCLeave unconnected

40/80 Column Switcher Mods: Projects like the S-Video + RGBI Auto-Switcher read the state of the C128's 40/80 key or active display flag to automatically switch your monitor between VIC-IIe and VDC outputs.

Fast Burst-Mode 6-Pin DIN IEC Serial Port & Internal 1571 Drive Interface

6-Pin DIN IEC Serial Port (Burst-Capable)

In C128 mode with a 1571 or 1581 drive, the C128 uses Pin 1 (/SRQ IN) and CIA#1's hardware synchronous serial shift register to transfer data at ~5,200 bytes/sec (over 12× faster than stock C64 IEC!):

PinSignalBurst Mode Role
1/SRQ INFast Burst Clock! Must be connected end-to-end in your 6-pin DIN cable (some cheap 5-wire C64 cables omit Pin 1, breaking 1571 Burst Mode!).
2GNDSignal ground
3/ATNAttention strobe
4/CLKStandard IEC Clock
5/DATAStandard & Burst Serial Data
6/RESETDrive Reset

C128D / C128DCR Internal 1571 Drive Notes

  • Device ID Switching (Drive 8 vs Drive 9): On the C128D/DCR, the internal 1571 defaults to Device 8. To boot from an external SD2IEC or Pi1541 as Device 8, either run software unit swapping (`OPEN 15,8,15,"U0>"+CHR$(9):CLOSE 15`) or wire a toggle switch to the internal device-select jumper pads (J1/J2).
  • 300 RPM Spindle Speed & Index Sensor: The 1571 uses a direct-drive brushless motor (on Alps/Newtronics mechanisms) and an optical index hole sensor required for reading CP/M MFM disks. Clean the index LED/phototransistor window with a dry cotton bud if CP/M disks fail to boot while standard GCR C64 disks still load.
  • JiffyDOS 128 Upgrade: Requires upgrading both the C128 Kernal ROM (plus C64-mode Kernal ROM) AND the 1571 drive DOS ROM (32 KB 27C256).

Chip & Function ROM Reference

Interactive IC Pinout Finder cards plus C128 custom VLSI and U36 Internal Function ROM EPROM guide.

Custom C128 48-Pin VLSI Reference

ChipPart NumberFunction & Substitution Notes
U7 (MMU) MOS 8722R1 / R2 (DIP-48) Controls 128K RAM banking, zero-page/stack relocation, common RAM areas, and Z80/8502/C64 mode selection at $D500–$D50B.
U11 (PLA) MOS 8721R3 (DIP-48) Large 48-pin gate array decoding all chip selects and bus phases. Modern CPLD replacements (e.g. PLAnkton 128 / UAV) are available.
U21 (VIC-IIe) MOS 8564 (NTSC) / 8566 (PAL) 48-pin enhanced VIC-II adding the 2 MHz clock generator, keypad scan lines (K0–K2), and CHROMA/LUMA separation.
U22 (VDC) MOS 8563R7A/R8/R9 (Flat/D) vs 8568 (DCR) 80-column RGBI controller accessed via two indirect registers at $D600 (Index/Status) and $D601 (Data). Revision R9 fixes earlier R7A block-copy bugs.

U36 Function ROM & System EPROM Guide

Every C128 motherboard includes an empty 28-pin JEDEC socket at U36 (Internal Function ROM) that maps directly into memory bank 4 ($8000–$FFFF) and auto-boots on startup (unless bypassed by holding CONTROL)!

SocketFlat C128 (310379)C128DCR (250477)Direct EPROM Drop-In
U36 (Internal Function ROM) Empty 28-pin socket (up to 32 KB) Empty 28-pin socket (up to 32 KB) 27C256 (32 KB) or 27C128 (16 KB) drops straight in with zero adapters! Popular U36 ROMs: Servant 128, GEOS 128 Boot ROM, KeyDOS, SuperChip, or C128 DiagROM.
U32 (C64 BASIC + Kernal) 251913-01 (16 KB, 28-pin) 251913-01 (16 KB, 28-pin) 27C128 (16 KB) direct drop-in (or 27C256 with A14 toggle switch for JiffyDOS 64).
U33 / U34 / U35 (C128 BASIC & Kernal) Three separate 16 KB ROMs (U33/U34 BASIC 7.0, U35 Editor/Z80/Kernal) Condensed into two 32 KB ROMs (U32 = 32K BASIC 7.0, U34 = 32K C64+C128 Kernal) 27C128 (for 16K sockets) or 27C256 (for 32K DCR sockets) — 100% standard JEDEC 28-pin pinout!

Why C128 ROM Sockets Are a Joy: Unlike the breadbin C64 (which used 24-pin 2364 ROMs requiring adapters), every ROM socket on the C128 uses a standard 28-pin JEDEC pinout — meaning standard 27C128 and 27C256 EPROMs plug straight in without any adapter boards!

Resources & Further Reading

Blog posts, interactive bench tools, and essential Commodore 128 archives.

Bench Tools & Machine Hubs

External C128 Resources

Commodore 8-Bit 1985 · Dual-CPU 8-Bit Computers

Commodore 128 (128 / 128D / DCR) — Unified Workbench Reference

Z80A-first dual-CPU boot sequence diagnostics, 80-column RGBI VDC & 64KB VRAM upgrade, 5-pin square DIN PSU pinouts, and U36 Function ROMs.

CPU / Architecture MOS 8502 @ 2 MHz + Zilog Z80A @ 4 MHz
Memory (RAM / VRAM) 128 KB DRAM + 16/64 KB VDC VRAM
Capacitor Mount Through-Hole
Custom Chipset & Key ICs
MOS 8502 Z80A 8563/8568 VDC 8564/8566 VIC-IIe 8722 MMU 8721 PLA SID 6581/8580
Capacitor & Power Stage Reference

Commodore 128 / 128D — Capacitor & Recap Reference

Board revisions, electrolytic capacitor lists, voltage/farad ratings, and Through-Hole servicing notes.

Commodore 128 / 128D — Printable Board Recap & Capacitor BOM ReferenceFormat this system's capacitor replacement list, diagnostic flowchart, and IC pinouts into a high-contrast bench PDF.

Commodore 128 — ASSY 310379 (C128 Flat) & ASSY 250477 (C128DCR)

Dual-CPU 8502 + Z80A 40/80-column mainboard • Mount: Through-hole • Difficulty: Beginner friendly

Full Printable Recap Sheet →

Mainboard (ASSY 310379) (12 Capacitors)

Ref Capacitance Voltage Package / Type Circuit Location & Bench Notes
C12 10 uF 25 V Radial
C20 10 uF 25 V Radial
C40 4.7 uF 25 V Radial
C43 10 uF 25 V Radial
C59 1 uF 50 V Radial
C61 10 uF 25 V Radial
C92 100 uF 16 V Radial
C100 100 uF 16 V Radial
C104 10 uF 25 V Radial
C106 2200 uF 25 V Axial
C107 1000 uF 25 V Axial
C109 470 uF 16 V Radial
Printable Diagnostic Flowchart & Voltage CheckpointsFormat this step-by-step fault isolation tree into a high-contrast bench reference sheet.
Interactive Pinouts, Visualizers & Disassemblers

Commodore 128 / 128D — System Bench Tools & IC Pinouts

Click any chip below to open its interactive DIP/PLCC pinout diagram, pin-by-pin signal table, and oscilloscope test waveforms.

Commodore 128 / 128D — Printable IC Pinout & Chipset SummaryPrint this system's custom IC pinout summary or open any chip card below for its full DIP/PLCC pinout sheet.
DIP-14 74-Series Gates

74LS08

SN74LS08N / DM74LS08N

Quad 2-input AND gate — same 14-pin pinout as the 74LS00, with outputs high only when both inputs are high.

Open Interactive Pinout →
DIP-16 74-Series Decoders

74LS139

SN74LS139N / DM74LS139A

Dual 2-to-4 line decoder — two independent decoders, each with one active-low enable and four active-low outputs.

Open Interactive Pinout →
DIP-14 74-Series Gates

74LS14

SN74LS14N / DM74LS14N

Hex Schmitt-trigger inverter — six NOT gates with hysteresis, the standard cure for slow or noisy input edges.

Open Interactive Pinout →
DIP-14 4000-Series Switches

CD4066

CD4066B / MC14066 / HEF4066

Quad bilateral switch — four analogue/digital switches with independent controls; control pins are not adjacent to the switches they operate.

Open Interactive Pinout →
DIP-40 MOS 6500

MOS 8502

MOS 8502

The Commodore 128 CPU — a 6510 with a 7-bit I/O port, running at 1 MHz or 2 MHz.

Open Interactive Pinout →
DIP-40 Zilog Z80

Zilog Z80

Z8400 / Z84C00

The 8-bit CPU behind the ZX Spectrum, MSX, Amstrad CPC and countless CP/M machines.

Open Interactive Pinout →
DIP-40 MOS 6500 Peripheral

MOS 6526 CIA

MOS 6526 / 6526A / 8521

Two 8-bit I/O ports, two timers, a time-of-day clock and a serial port — the C64 peripheral chip.

Open Interactive Pinout →
DIP-48 MOS 6500 Peripheral

MOS 8722 MMU

MOS 8722R1 / 8722R2

The Commodore 128's Memory Management Unit — switches between Z80, C128 (8502) and C64 modes, banks 128KB RAM, and relocates Zero-Page and Stack.

Open Interactive Pinout →
DIP-16 MOS Timing

MOS 8701 Clock Generator

MOS 8701 (251527-01)

The 16-pin master clock multiplier/divider in the Commodore 64 (ASSY 250425/250466) and Commodore 128 — generates Color Clock and Dot Clock from a single crystal.

Open Interactive Pinout →
DIP-28 Floppy Disk Controller

WD1770 / WD1772 Floppy Controller

WD1770-PH / WD1772-PH / VL1772-02PC

The compact 28-pin single-rail (+5V) FM/MFM floppy controller with built-in digital data separator and motor-on timer — used in the Atari ST, BBC Micro/Master and C128D/1571/1581.

Open Interactive Pinout →
DIP-40 MOS VIC-II

MOS 6567 / 6569 VIC-II

MOS 6567 / 6569 / 8562 / 8565

The Commodore 64 video chip — generates the display, the system clock and the DRAM timing.

Open Interactive Pinout →
DIP-28 MOS SID

MOS 6581 SID

MOS 6581 / 6581R4

The Commodore 64's sound chip — three-voice synthesiser with filter, envelope and paddle ADC.

Open Interactive Pinout →
DIP-28 MOS SID

MOS 8580 SID

MOS 8580 / 6582

The later C64/C128 sound chip — same pinout as the 6581 but 9 V supply and a cleaner filter.

Open Interactive Pinout →
DIP-48 MOS Video

MOS 8563 / 8568 VDC

MOS 8563R9 / 8568 (C128DCR)

The Commodore 128's 80-column RGBI Video Display Controller — accessed through just two I/O registers ($D600/$D601) with its own private 16KB or 64KB VRAM.

Open Interactive Pinout →
DIP-28 EPROM

2764 8K x 8 EPROM

2764 / 2764A / 27C64 / M2764A / HN482764

8K x 8 UV-erasable EPROM, the JEDEC 28-pin byte-wide standard. Same pinout as the 6264 SRAM except for four pins.

Open Interactive Pinout →
DIP-28 EPROM

27128 / 27256 EPROM & CPC 40009 System ROM

Amstrad 40009 / 27C128 (16KB) / 27C256 (32KB) / 27C512

16KB (27128) and 32KB (27256) JEDEC 28-pin ROM/EPROM — direct drop-in replacement for the Amstrad CPC 464's 32KB OS + Locomotive BASIC ROM (IC103, part 40009).

Open Interactive Pinout →
DIP-16 Dynamic RAM

4164 64K x 1 DRAM

4164 / MT4264 / TMS4164 / MB8264 / KM4164 / 41464 (x4)

64K x 1 DRAM, single +5 V. VCC is pin 8 and GND is pin 16 — the reverse of almost every other 16-pin DIP. Apply 5 V to pin 16 and it dies.

Open Interactive Pinout →
DIP-18 Dynamic RAM

4416 / 4464 (16K/64K x 4) DRAM

TMS4416 / MB81416 / TMS4464 / MT4067 / KM41464

The 18-pin nibble-wide (x4) DRAM family — just TWO chips replace eight 4116/4164 DRAMs! Upgrading 4416 to 4464 unlocks 64KB on the C16, C128 VDC, CoCo 2 and Atari 600XL.

Open Interactive Pinout →
DIP-28 Static RAM

6264 8K x 8 SRAM

6264 / HM6264 / 5564 / TC5565 / UM6264

8K x 8 SRAM, the JEDEC 28-pin byte-wide standard. Two chip selects of opposite polarity — leave CS2 floating and it never responds.

Open Interactive Pinout →
Source: https://smiggy.com/c128 | Free Hardware Reference & Diagnosticssmiggy.com — Martin “Smiggy” Smith

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