Pinout diagram
Summary specifications
Full pin reference
| Pin | Name | Group | Direction | Levels | Description |
|---|---|---|---|---|---|
| 1 | 1A | I/O | Input | TTL Schmitt, 0 V / 5 V | Inverter 1 input. Schmitt-trigger: rising threshold approx. 1.6 V, falling threshold approx. 0.8 V. An unused input must be tied to a rail. |
| 2 | 1Y | I/O | Output | TTL totem-pole | Inverter 1 output. Low when 1A is above the rising threshold, high when 1A is below the falling threshold. |
| 3 | 2A | I/O | Input | TTL Schmitt, 0 V / 5 V | Inverter 2 input. Schmitt-trigger thresholds as pin 1. |
| 4 | 2Y | I/O | Output | TTL totem-pole | Inverter 2 output. Low when 2A is above the rising threshold. |
| 5 | 3A | I/O | Input | TTL Schmitt, 0 V / 5 V | Inverter 3 input. Schmitt-trigger thresholds as pin 1. |
| 6 | 3Y | I/O | Output | TTL totem-pole | Inverter 3 output. Low when 3A is above the rising threshold. |
| 7 | GND | Ground | Power | 0 V | Ground return for all six inverters. |
| 8 | 4Y | I/O | Output | TTL totem-pole | Inverter 4 output. Low when 4A is above the rising threshold. |
| 9 | 4A | I/O | Input | TTL Schmitt, 0 V / 5 V | Inverter 4 input. Schmitt-trigger thresholds as pin 1. |
| 10 | 5Y | I/O | Output | TTL totem-pole | Inverter 5 output. Low when 5A is above the rising threshold. |
| 11 | 5A | I/O | Input | TTL Schmitt, 0 V / 5 V | Inverter 5 input. Schmitt-trigger thresholds as pin 1. |
| 12 | 6Y | I/O | Output | TTL totem-pole | Inverter 6 output. Low when 6A is above the rising threshold. |
| 13 | 6A | I/O | Input | TTL Schmitt, 0 V / 5 V | Inverter 6 input. Schmitt-trigger thresholds as pin 1. |
| 14 | VCC | Power | Power | +5 V | Positive supply. Decouple with 100 nF close to the pin. |
Common uses and repair diagnostics
The 74LS14 is the hex Schmitt-trigger inverter — six independent NOT gates whose inputs have hysteresis, so a slow or noisy input edge produces a single clean output transition instead of a burst of oscillation. It shares its pinout with the 74LS04 exactly: six inverters in a 14-pin DIP, inputs and outputs alternating down the package, GND on 7, VCC on 14. The difference is inside: a 74LS04 input switches at a single threshold, so a signal that lingers around that threshold makes the output chatter; a 74LS14 input has separate rising and falling thresholds, so the same signal produces one clean edge.
The 74LS14 is the part you reach for whenever a signal arrives at a board with a slow or noisy edge — a mechanical switch debounced into a logic input, an RC-delayed reset line, a clock recovered from a tape or disk signal. A plain 74LS04 inverter would chatter on those edges; the Schmitt-trigger hysteresis on the 74LS14 turns each messy transition into one clean output edge, which is why it is the standard front end for debounce circuits, simple RC oscillators and signal-conditioning stages on retro boards. The 74HC14 and 74HCT14 are the CMOS equivalents and share the same pinout.
- With power off, probe pin 14 (VCC) to pin 7 (GND) for a low-ohms supply rail; a dead short or open points to a decoupling capacitor or the chip itself.
- Power up and check pin 14 sits at 4.75 to 5.25 V. A sagging rail pulls the inverter outputs out of spec and is often the real fault, not the gate.
- Drive an input with a slow ramp and watch the output switch once, cleanly. Multiple transitions mean the Schmitt thresholds have drifted or the input is too noisy even for the hysteresis.
- Tie any unused inverter input to VCC through a 1 kR resistor; a floating LS input drifts and, on a Schmitt part, can sit between the thresholds and draw extra current.
- If the part is warm to the touch, suspect an output shorted to another gate or a floating input oscillating — a 74LS14 should draw only a few milliamps at rest.