Pinout diagram
Summary specifications
Full pin reference
| Pin | Name | Group | Direction | Levels | Description |
|---|---|---|---|---|---|
| 1 | GND | Ground | Power | 0 V | Ground. As on the 6522, VCC is pin 20, not pin 40. Pin 40 is CNT, a counter line. |
| 2 | PA0 | I/O | Bidirectional | TTL, 0 V / 5 V | Port A bit 0. Independently programmable as input or output. |
| 3 | PA1 | I/O | Bidirectional | TTL, 0 V / 5 V | Port A bit 1. |
| 4 | PA2 | I/O | Bidirectional | TTL, 0 V / 5 V | Port A bit 2. |
| 5 | PA3 | I/O | Bidirectional | TTL, 0 V / 5 V | Port A bit 3. |
| 6 | PA4 | I/O | Bidirectional | TTL, 0 V / 5 V | Port A bit 4. |
| 7 | PA5 | I/O | Bidirectional | TTL, 0 V / 5 V | Port A bit 5. |
| 8 | PA6 | I/O | Bidirectional | TTL, 0 V / 5 V | Port A bit 6. |
| 9 | PA7 | I/O | Bidirectional | TTL, 0 V / 5 V | Port A bit 7. |
| 10 | PB0 | I/O | Bidirectional | TTL, 0 V / 5 V | Port B bit 0. Independently programmable as input or output. |
| 11 | PB1 | I/O | Bidirectional | TTL, 0 V / 5 V | Port B bit 1. |
| 12 | PB2 | I/O | Bidirectional | TTL, 0 V / 5 V | Port B bit 2. |
| 13 | PB3 | I/O | Bidirectional | TTL, 0 V / 5 V | Port B bit 3. |
| 14 | PB4 | I/O | Bidirectional | TTL, 0 V / 5 V | Port B bit 4. |
| 15 | PB5 | I/O | Bidirectional | TTL, 0 V / 5 V | Port B bit 5. |
| 16 | PB6 | I/O | Bidirectional | TTL, 0 V / 5 V | Port B bit 6. Can provide timer output. |
| 17 | PB7 | I/O | Bidirectional | TTL, 0 V / 5 V | Port B bit 7. Can provide timer output. |
| 18 | /PC | Control | Output | TTL, active low | Active low. Port Control. Goes low for one cycle after a read or write of port B — the handshake strobe. This pin differs from the 6522, where pin 18 is CB1. |
| 19 | TOD | Clock / Timing | Input | TTL clock | Time of Day clock input. Fed from the 50 Hz or 60 Hz mains frequency. Feed a 50 Hz machine 60 Hz and the software clock runs fast. On a C64 this comes off the PSU AC line, so a TOD fault often traces back to the supply. |
| 20 | VCC | Power | Power | +5 V | Positive supply. Decouple with 100 nF close to the pin. This is pin 20, not pin 40. |
| 21 | /IRQ | Control | Open-drain / open-collector | TTL, active low, open drain | Active low. Interrupt request, open-drain. Several CIAs can share one interrupt line. |
| 22 | R/W | Control | Input | TTL | Read / Write. High reads a register, low writes one. |
| 23 | /CS | Control | Input | TTL, active low | Active low. Single chip select — unlike the 6522, which has CS1 plus /CS2. |
| 24 | /FLAG | Control | Input | TTL, active low | Active low. Negative-edge-sensitive interrupt input. Used for handshaking or as a general-purpose interrupt. This pin differs from the 6522, where pin 24 is CS1. |
| 25 | PHI2 | Clock / Timing | Input | TTL clock | Phase 2 system clock. All register access is timed to this clock. |
| 26 | D7 | Data Bus | Bidirectional | TTL, 0 V / 5 V | Data bus bit 7. |
| 27 | D6 | Data Bus | Bidirectional | TTL, 0 V / 5 V | Data bus bit 6. |
| 28 | D5 | Data Bus | Bidirectional | TTL, 0 V / 5 V | Data bus bit 5. |
| 29 | D4 | Data Bus | Bidirectional | TTL, 0 V / 5 V | Data bus bit 4. |
| 30 | D3 | Data Bus | Bidirectional | TTL, 0 V / 5 V | Data bus bit 3. |
| 31 | D2 | Data Bus | Bidirectional | TTL, 0 V / 5 V | Data bus bit 2. |
| 32 | D1 | Data Bus | Bidirectional | TTL, 0 V / 5 V | Data bus bit 1. |
| 33 | D0 | Data Bus | Bidirectional | TTL, 0 V / 5 V | Data bus bit 0. |
| 34 | /RES | Control | Input | TTL, active low | Active low. Reset. Clears all registers and sets all port lines to input. |
| 35 | RS3 | Address Bus | Input | TTL | Register select bit 3. RS0 to RS3 select one of 16 register addresses. |
| 36 | RS2 | Address Bus | Input | TTL | Register select bit 2. |
| 37 | RS1 | Address Bus | Input | TTL | Register select bit 1. |
| 38 | RS0 | Address Bus | Input | TTL | Register select bit 0. |
| 39 | SP | I/O | Bidirectional | TTL | Serial Port data line. Used with CNT (pin 40) for the fast serial transfer on the C128 and 1571. |
| 40 | CNT | I/O | Bidirectional | TTL | Counter line. Clocks the serial port and the timers. This is pin 40, not VCC — do not put 5 V here. |
Common uses and repair diagnostics
The MOS 6526 Complex Interface Adapter is the C64 peripheral chip: two 8-bit ports, two timers, a time-of-day clock and a serial port. It shares power, data, register selects and both ports with the 6522 VIA, but pins 18, 19, 23, 24, 39 and 40 differ in function — it is NOT a 6522 substitute despite the overlap. As with the 6522, VCC is pin 20, not pin 40. Pin 40 is CNT, a counter line.
The 6526 CIA is the C64 peripheral chip. Two of them sit in every C64: CIA 1 scans the keyboard and joystick port 1, while CIA 2 drives the serial bus, the user port and the /NMI line. So a dead keyboard points at CIA 1 and a missing disk drive points at CIA 2 — that split is the most useful diagnostic on the page. The TOD clock (pin 19) is fed from the 50 Hz or 60 Hz mains, so a clock that runs fast or slow often traces back to the PSU, not the CIA.
The 6526 shares power, data, register selects, R/W, PHI2, /RES and both ports with the 6522 VIA, but pins 18, 19, 23, 24, 39 and 40 differ in function. It is NOT a 6522 substitute. The 6526 is 1 MHz rated, the 6526A is 2 MHz; either works in a C64 or C128 because the I/O is always clocked at 1 MHz. The 8521 is the HMOS-2 version.
- Check pin 1 (GND) at 0 V and pin 20 (VCC) at 5 V. Do NOT expect VCC at pin 40 — that is CNT.
- Dead keyboard: probe CIA 1 (the one scanning the keyboard matrix). A port bit stuck high or low points at a failed CIA.
- No disk drive: probe CIA 2 (the one driving the serial bus). The serial handshake lines are on its ports.
- TOD clock running fast or slow: check pin 19 (TOD) for the correct mains frequency. The fault is usually the PSU, not the CIA.
- If /IRQ (pin 21) is stuck low, the system sits in an interrupt loop. CIA 2 drives /NMI through its port, so check that too.