Universal Interactive Signal & Trace Visualizer — Oscilloscope & Logic Analyzer

Client-side oscilloscope & 8-channel logic analyzer for C64/C128, Amiga/Atari 16-bit, ZX Spectrum/Z80, 74/4000-series logic, 7805 power rails, and 433 MHz / 38 kHz remote bursts

Universal Interactive Signal & Trace Visualizer (Oscilloscope & Logic Analyzer)

100% client-side virtual storage oscilloscope and 8-channel logic analyzer. Compare expected healthy waveforms against common hardware faults (bad electrolytic cap ripple, dead crystal clocks, PLA/DRAM bus contention, 4116 voltage traps, and 433 MHz / 38 kHz remote bursts) with live ΔV, ΔT, and frequency cursors.

SCOPE TRIG: AUTO · READY
Platform Category:
Voltage Delta (ΔV) 4.50 V V1: 0.15 V · V2: 4.65 V
Time Delta (ΔT) 1.01 µs T1: 500 ns · T2: 1.52 µs
Cursor Freq (f = 1/ΔT) 985.2 kHz Nominal: 985.248 kHz
Expected Peak-to-Peak 4.50 Vpp MOS 6510 · Pin 39 (Φ2)

Healthy State — MOS 6510 Pin 39 (Φ2)

Common Fault — Dead VIC-II Clock or Bus Loading

How to Use the Interactive Oscilloscope & Logic Analyzer on the Repair Bench

When diagnosing a dead or glitching retro computer motherboard, a digital multimeter only tells you average DC voltage — it hides 100 Hz capacitor ripple, missing CPU clock phases, stuck chip-select lines, and three-state bus contention. This client-side Signal & Trace Visualizer models the exact oscilloscope waveforms and multi-channel logic analyzer timing diagrams you should see on a healthy board, overlaid directly against the most frequent hardware failure modes.

1. Commodore 64 & C128 Clock, PLA & SID Waveforms

On a Commodore 64 or Commodore 128, always begin black-screen troubleshooting by probing the MOS 6510 CPU power-on reset ramp at Pin 40 (/RES) and the 0.985 MHz (PAL) / 1.023 MHz (NTSC) system clock at Pin 39 (Φ2). Next, switch the visualizer to Logic Analyzer (8-Ch) or Mixed-Signal (MSO) mode to inspect 82S100 PLA pins 15–18 (/BASIC, /KERNAL, /CHAROM, /CASRAM). If a chip-select pulse sits at an invalid ~1.8 V mid-rail step instead of pulling cleanly below 0.4 V, either the PLA has suffered thermal fuse-link degradation or a shorted 4164/4116 DRAM is fighting the data bus.

2. Amiga & Atari ST 16-Bit 68000 Bus & 28 MHz Master Clocks

On the Commodore Amiga (A500, A600, A1200) and Atari ST, the Motorola MC68000 relies on an asynchronous handshake between /AS (Pin 6), /UDS//LDS (Pins 7–8), and /DTACK (Pin 10) across states S0–S7. If corrosive SMD capacitor electrolyte on an A600 or A1200 breaks a trace near Agnus/Alice, Denise/Lisa, or Paula, the 28.375 MHz master clock and 15.625 kHz /CSYNC signals will exhibit severe ringing, line tilt, or op-amp audio clipping.

3. ZX Spectrum Z80 M1 Fetch Cycles & 4116 Triple-Rail Power Traps

On the Sinclair ZX Spectrum 16K/48K, the Ferranti ULA generates the 3.50 MHz clock for Z80A Pin 6 (briefly holding the clock high during display contention) while multiplexing addresses for the eight lower-bank 4116 DRAM chips. Use the 4116 Triple-Rail DC Power profile to compare a clean −5 V / +12 V / +5 V supply against the catastrophic −5 V rail dropout that destroys 4116 RAMs in milliseconds.

4. 7805 Linear Regulators, 555 Timers & 433 MHz / 38 kHz Remote Handsets

For general electronics and remote control servicing, select the Generic Logic & Power or RF & IR Handsets category to inspect 100 Hz/120 Hz sawtooth ripple on dried-out bulk filter capacitors, exponential RC charging thresholds on NE555 Pins 2/6, 433.92 MHz OOK/ASK EV1527/PT2262 code bursts under weak coin-cell battery sag, and 38 kHz NEC infrared carrier pulse trains.

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