4116 DRAM Pinout — 16K x 1 Dynamic RAM

DIP-16 · Memory · 4116 / MK4116 / TMS4116 / MCM4116 / uPD416

Pinout diagram

Summary specifications

Technology NMOS dynamic RAM
Operating Voltage THREE rails: VBB -5 V (pin 1), VCC +5 V (pin 9), VDD +12 V (pin 8), VSS 0 V (pin 16)
Capacity 16,384 words x 1 bit (16,384 bits)
Refresh All 128 rows within the refresh interval — cannot be left static like SRAM
Addressing 7 address lines multiplexed by /RAS and /CAS give 128 x 128 = 16,384 bits
Power Sequencing -5 V bias should be present before +12 V; missing -5 V gives flaky heat-dependent errors

Full pin reference

Pin Name Group Direction Levels Description
1 VBB Power Power -5 V (substrate bias) Substrate bias, -5 V. MUST be present before the +12 V on pin 8. A missing or sagging -5 V rail gives flaky, heat-dependent memory errors rather than a clean failure. On a 4164 this pin is no-connect.
2 DIN Data Bus Input TTL, 0 V / 5 V Data input. Separate from DOUT (pin 14) because it is a x1 device. Eight chips make a byte.
3 /WE Control Input TTL, active low Active low. Write Enable. Low writes DIN into the selected address.
4 /RAS Control Input TTL, active low Active low. Row Address Strobe. Latches the row address from A0-A6.
5 A0 Address Bus Input TTL, 0 V / 5 V Address bit 0. The address pins are scrambled: A0 (5), A2 (6), A1 (7) — note A2 and A1 are swapped — then A5 (10), A4 (11), A3 (12), A6 (13). Seven lines multiplexed by /RAS and /CAS.
6 A2 Address Bus Input TTL, 0 V / 5 V Address bit 2. Note A2 is on pin 6 and A1 on pin 7 — they are swapped relative to numerical order.
7 A1 Address Bus Input TTL, 0 V / 5 V Address bit 1.
8 VDD Power Power +12 V Positive supply, +12 V. On a 4164 this pin is +5 V VCC — so a 4164 in a 4116 socket gets +12 V on its 5 V supply pin and will not survive.
9 VCC Power Power +5 V Logic supply, +5 V. On a 4164 this pin is A7 — so a 4164 in a 4116 socket gets a 5 V rail driven into an address input.
10 A5 Address Bus Input TTL, 0 V / 5 V Address bit 5.
11 A4 Address Bus Input TTL, 0 V / 5 V Address bit 4.
12 A3 Address Bus Input TTL, 0 V / 5 V Address bit 3.
13 A6 Address Bus Input TTL, 0 V / 5 V Address bit 6.
14 DOUT Data Bus Output TTL, 0 V / 5 V Data output. Separate from DIN (pin 2) because it is a x1 device.
15 /CAS Control Input TTL, active low Active low. Column Address Strobe. Latches the column address from A0-A6.
16 VSS Ground Power 0 V Ground. The only supply pin that is the same on the 4164.

Common uses and repair diagnostics

The 4116 is a 16,384-word x 1-bit dynamic RAM. The supply arrangement is the whole story: FOUR supply pins and THREE rails on a 16-pin chip. Pin 1 VBB = -5 V (substrate bias), pin 8 VDD = +12 V, pin 9 VCC = +5 V, pin 16 VSS = ground. The critical fact — and the most dangerous thing in this library — is that a 4164 is NOT a drop-in replacement for a 4116, and fitting one destroys it. See the four-pin comparison below and on the 4164 page. Power sequencing matters on this part too: the -5 V bias should be present before the +12 V rail. A missing or sagging -5 V rail gives flaky, heat-dependent memory errors rather than a clean failure, which makes it a classic misdiagnosis.

The 4116 is a 16,384-word x 1-bit dynamic RAM. Used in the ZX Spectrum 48K (the upper 32K), the Apple II, the TRS-80, the Commodore PET, the TI-99/4A's VDP memory, and early arcade boards. Eight chips make a byte.

The supply arrangement is the whole story: FOUR supply pins and THREE rails on a 16-pin chip. Pin 1 VBB = -5 V (substrate bias), pin 8 VDD = +12 V, pin 9 VCC = +5 V, pin 16 VSS = ground. Put the voltages in each pin's levels so they cannot be missed.

The critical fact — and the most dangerous thing in this library — is that a 4164 is NOT a drop-in replacement for a 4116, and fitting one destroys it. Compare the two directly: - pin 1: -5 V on the 4116, no-connect on the 4164 - pin 8: +12 V on the 4116, +5 V VCC on the 4164 - pin 9: +5 V on the 4116, A7 on the 4164 - pin 16: ground on both So a 4164 in a 4116 socket gets +12 V on its 5 V supply pin and a 5 V rail driven into an address input. It will not survive. Going the other way, a 4116 in a 4164 socket gets 5 V where it needs 12 V and an address line where it needs its 5 V rail, so it simply will not work. Adapter boards exist precisely because of this.

Power sequencing matters on this part too: the -5 V bias should be present before the +12 V rail. A missing or sagging -5 V rail gives flaky, heat-dependent memory errors rather than a clean failure, which makes it a classic misdiagnosis. Address pins are scrambled: A0 (5), A2 (6), A1 (7) — note A2 and A1 are swapped — then A5 (10), A4 (11), A3 (12), A6 (13). Seven address lines multiplexed by /RAS and /CAS give 128 x 128 = 16,384 bits. Separate DIN (2) and DOUT (14) because it is a x1 device. Needs refreshing — all 128 rows within the refresh interval — so it cannot simply be left static like an SRAM.

  • Measure all three rails at the chip before anything else, especially the -5 V on pin 1. A missing -5 V gives flaky heat-dependent errors, not a clean failure.
  • On a 48K Spectrum the lower 16K is a different memory type, so faults confined to the upper 32K point here.
  • A single failed bit plane gives characteristic repeating screen corruption rather than a dead machine.
  • Do NOT fit a 4164 to a 4116 socket — it gets +12 V on its 5 V pin and will not survive. Use an adapter board.
  • Check /RAS (pin 4) and /CAS (pin 15) are being strobed. No strobes means no refresh and no data.

Datasheets and references

Related chips

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