Pinout diagram
Used in Retro Machine Hubs
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Summary specifications
Full pin reference
| Pin | Name | Group | Direction | Levels | Description |
|---|---|---|---|---|---|
| 1 | /RAS | Control | Output | TTL, active low | Row Address Strobe to the eight 4116 lower RAM chips (IC6-IC13). |
| 2 | /CAS | Control | Output | TTL, active low | Column Address Strobe to the eight 4116 lower RAM chips. |
| 3 | DRAM /WE | Control | Output | TTL, active low | Write Enable to the eight 4116 lower RAM chips. |
| 4 | VA6 | Address Bus | Output | TTL | Multiplexed lower RAM address bit 6. |
| 5 | VA3 | Address Bus | Output | TTL | Multiplexed lower RAM address bit 3. |
| 6 | VA4 | Address Bus | Output | TTL | Multiplexed lower RAM address bit 4. |
| 7 | VA5 | Address Bus | Output | TTL | Multiplexed lower RAM address bit 5. |
| 8 | D0 | Data Bus | Bidirectional | TTL | Lower RAM data bit 0 (connected to Z80 D0 via 470 ohm contention-isolation resistor!). |
| 9 | D1 | Data Bus | Bidirectional | TTL | Lower RAM data bit 1. |
| 10 | D2 | Data Bus | Bidirectional | TTL | Lower RAM data bit 2. |
| 11 | D3 | Data Bus | Bidirectional | TTL | Lower RAM data bit 3. |
| 12 | D4 | Data Bus | Bidirectional | TTL | Lower RAM data bit 4. |
| 13 | D6 | Data Bus | Bidirectional | TTL | Lower RAM data bit 6. |
| 14 | D5 | Data Bus | Bidirectional | TTL | Lower RAM data bit 5. |
| 15 | V (R-Y) | Analog | Output | Analog PAL V | Red colour-difference (V / R-Y) output with alternating PAL phase to LM1889. |
| 16 | Y (VIDEO) | Analog | Output | Analog luma+sync | Composite Luminance + Sync output. |
| 17 | U (B-Y) | Analog | Output | Analog PAL U | Blue colour-difference (U / B-Y) output to LM1889. |
| 18 | VCC | Power | Power | +5 V | +5 V logic supply. |
| 19 | D7 | Data Bus | Bidirectional | TTL | Lower RAM data bit 7. |
| 20 | KB0 | I/O | Input | TTL (pulled high) | Keyboard matrix column input bit 0 (outermost keys: SHIFT, Z, A, Q, 1, 0, ENTER, SPACE). |
| 21 | KB1 | I/O | Input | TTL | Keyboard matrix column input bit 1. |
| 22 | KB2 | I/O | Input | TTL | Keyboard matrix column input bit 2. |
| 23 | A14 | Address Bus | Input | TTL | Z80 Address bit 14 (high for $4000-$7FFF lower RAM). |
| 24 | A15 | Address Bus | Input | TTL | Z80 Address bit 15 (low for $4000-$7FFF lower RAM). |
| 25 | /INT | Control | Output | TTL, active low | 50 Hz Vertical Blank Interrupt output to Z80 Pin 16. |
| 26 | /WR | Control | Input | TTL, active low | Z80 Write strobe input. |
| 27 | /MREQ | Control | Input | TTL, active low | Z80 Memory Request input. |
| 28 | MIC / TAPE / SOUND | Analog | Bidirectional | Analog/TTL | Combined Beeper speaker output, MIC tape output, and EAR tape input! |
| 29 | KB3 | I/O | Input | TTL | Keyboard matrix column input bit 3. |
| 30 | /IORQGE | Control | Input | TTL | I/O Request Gate (A0 + /IORQ). Low during IN/OUT to even ports ($FE). |
| 31 | KB4 | I/O | Input | TTL | Keyboard matrix column input bit 4 (innermost keys: V, B, G, H, T, Y, 5, 6). |
| 32 | PHI (CLK CPU) | Clock / Timing | Output | TTL 3.5 MHz | 3.5 MHz Z80 clock output (driven through TR3 buffer). Stretched high during ULA video contention. |
| 33 | /IOULA | Control | Input | TTL | ULA I/O select / contention input. |
| 34 | /ROMCS | Control | Output | TTL, active low | 23128 16 KB ROM Chip Select output ($0000-$3FFF; can be overridden by Interface 1 / DivMMC via expansion port). |
| 35 | VA2 | Address Bus | Output | TTL | Multiplexed lower RAM address bit 2. |
| 36 | VA1 | Address Bus | Output | TTL | Multiplexed lower RAM address bit 1. |
| 37 | VA0 | Address Bus | Output | TTL | Multiplexed lower RAM address bit 0. |
| 38 | /RD | Control | Input | TTL, active low | Z80 Read strobe input. |
| 39 | CLK14 | Clock / Timing | Input | 14 MHz | 14.000 MHz master crystal oscillator input. |
| 40 | GND | Ground | Power | 0 V | System ground (0 V). |
Common uses and repair diagnostics
The 40-pin Ferranti Uncommitted Logic Array (ULA — 5C102E/5C112E on Issue 1/2 boards; 6C001E-6/6C001E-7 on Issue 3 through 48K Plus boards) is the heart of the ZX Spectrum 16K and 48K. Driven by a 14.000 MHz crystal, it generates the 3.5 MHz Z80 clock (Pin 32 PHI, halting the clock briefly during contended lower-RAM accesses!), owns the private bus to the eight 4116 DRAMs in the lower 16 KB ($4000-$7FFF), generates 256x192 pixel + 32x24 attribute video as analogue Y, U, and V signals for the LM1889 PAL encoder, scans the 5-bit keyboard half-rows (KB0-KB4), and handles the EAR/MIC cassette interface and speaker beeper.
Used in all Sinclair ZX Spectrum 16K, 48K, and 48K+ models (Issue 1 through Issue 6A). Because the ULA owns the lower 16 KB 4116 DRAM bus directly, a single shorted 4116 chip (caused by a blown TR4/TR5 DC-DC inverter transistor) can feed +12 V onto D0-D7 (Pins 8-14, 19) and damage the ULA if not caught promptly.
- Always test the -5 V and +12 V rails on the 4116 DRAMs BEFORE inserting a working Ferranti ULA or modern vLA82 / Nebula replacement!
- Scope Pin 39 (14 MHz in), Pin 32 (3.5 MHz CPU clock out), and Pin 16 (Y Video + Sync).
- Note that Issue 2 boards use 5C102E / 5C112E while Issue 3-6A boards use 6C001E-6 / 6C001E-7 (putting a 5C ULA into an Issue 3+ board without the keyboard pull-up resistor mod affects EAR/keyboard levels).