Yamaha YM2149F Pinout — Sound Chip

DIP-40 · Sound & Video · YM2149F / YM2149 / AY-3-8910A compatible

Pinout diagram

Summary specifications

Technology NMOS
Operating Voltage +5 V single supply (VCC pin 40, VSS pin 1)
Sound Channels Three square-wave tone channels, one noise generator, one envelope generator (5-bit, vs AY 4-bit)
I/O Ports Two 8-bit bidirectional (port A and port B)
Pin Compatibility Pin compatible with AY-3-8910; pin 26 SEL has internal pull-up for full compatibility
Clock External clock on pin 22; SEL high = clock as-is, SEL low = clock divided by 2

Full pin reference

Pin Name Group Direction Levels Description
1 VSS Ground Power 0 V Ground. VCC is pin 40.
2 NC No Connect Not connected No connect No connect. Do not wire.
3 CH B Analog Output Analogue audio Channel B analogue output. Same out-of-order layout as the AY-3-8910: B on 3, A on 4, C on 38.
4 CH A Analog Output Analogue audio Channel A analogue output.
5 NC No Connect Not connected No connect No connect. Do not wire.
6 IOB7 I/O Bidirectional TTL, 0 V / 5 V Port B bit 7. Port B descends IOB7 to IOB0 on pins 6-13.
7 IOB6 I/O Bidirectional TTL, 0 V / 5 V Port B bit 6.
8 IOB5 I/O Bidirectional TTL, 0 V / 5 V Port B bit 5.
9 IOB4 I/O Bidirectional TTL, 0 V / 5 V Port B bit 4.
10 IOB3 I/O Bidirectional TTL, 0 V / 5 V Port B bit 3.
11 IOB2 I/O Bidirectional TTL, 0 V / 5 V Port B bit 2.
12 IOB1 I/O Bidirectional TTL, 0 V / 5 V Port B bit 1.
13 IOB0 I/O Bidirectional TTL, 0 V / 5 V Port B bit 0.
14 IOA7 I/O Bidirectional TTL, 0 V / 5 V Port A bit 7. Port A descends IOA7 to IOA0 on pins 14-21, wrapping around the bottom.
15 IOA6 I/O Bidirectional TTL, 0 V / 5 V Port A bit 6.
16 IOA5 I/O Bidirectional TTL, 0 V / 5 V Port A bit 5.
17 IOA4 I/O Bidirectional TTL, 0 V / 5 V Port A bit 4.
18 IOA3 I/O Bidirectional TTL, 0 V / 5 V Port A bit 3.
19 IOA2 I/O Bidirectional TTL, 0 V / 5 V Port A bit 2.
20 IOA1 I/O Bidirectional TTL, 0 V / 5 V Port A bit 1.
21 IOA0 I/O Bidirectional TTL, 0 V / 5 V Port A bit 0.
22 CLOCK Clock / Timing Input TTL clock Clock input. Typically 1-2 MHz. SEL (pin 26) selects whether this clock is used directly or divided by two.
23 /RESET Control Input TTL, active low Active low. Reset. Clears all registers and silences the chip.
24 /A9 Control Input TTL, active low Active low. Address bit 9 — half of the two-pin chip select. The chip responds only when /A9 is LOW and A8 (pin 25) is HIGH.
25 A8 Control Input TTL, active high Address bit 8, active HIGH. The other half of the two-pin chip select.
26 SEL Control Input TTL Master-clock divider select. HIGH uses the input clock as the master clock; LOW divides by two. Has an internal pull-up, so leaving it unconnected gives full AY-3-8910 pin compatibility. This is the ONLY pinout difference from the AY-3-8910.
27 BDIR Control Input TTL Bus Direction. Together with BC1 (29) and BC2 (28) forms the bus-control trio.
28 BC2 Control Input TTL Bus Control 2. In most designs simply tied high.
29 BC1 Control Input TTL Bus Control 1. Together with BDIR (27) selects the bus action.
30 DA7 Data Bus Bidirectional TTL, 0 V / 5 V Data/address bit 7. The multiplexed bus descends DA7 to DA0 on pins 30-37.
31 DA6 Data Bus Bidirectional TTL, 0 V / 5 V Data/address bit 6.
32 DA5 Data Bus Bidirectional TTL, 0 V / 5 V Data/address bit 5.
33 DA4 Data Bus Bidirectional TTL, 0 V / 5 V Data/address bit 4.
34 DA3 Data Bus Bidirectional TTL, 0 V / 5 V Data/address bit 3.
35 DA2 Data Bus Bidirectional TTL, 0 V / 5 V Data/address bit 2.
36 DA1 Data Bus Bidirectional TTL, 0 V / 5 V Data/address bit 1.
37 DA0 Data Bus Bidirectional TTL, 0 V / 5 V Data/address bit 0.
38 CH C Analog Output Analogue audio Channel C analogue output. Across the package from CH A and CH B.
39 TEST 1 No Connect Not connected No connect Factory test pin. Do not connect.
40 VCC Power Power +5 V Positive supply. Decouple with 100 nF close to the pin.

Common uses and repair diagnostics

The Yamaha YM2149F is Yamaha's licensed version of the GI AY-3-8910. It is pin compatible with the AY-3-8910 with one pin difference: pin 26 is SEL, the master-clock divider select, where the AY has a TEST 2 factory pin. SEL HIGH uses the input clock as the master clock; SEL LOW divides the input clock by two. Yamaha's datasheet states the pin has an internal pull-up resistor, so leaving it unconnected gives full AY-3-8910 pin compatibility. That is the headline — the swap "just works" in both directions electrically, though the envelope rate differs (see below).

The Yamaha YM2149F is Yamaha's licensed version of the GI AY-3-8910, used in the Atari ST (its signature sound chip), later MSX machines and much arcade hardware. Clones and rebadges include the KC89C72, WF19054, AM2149F and WB5300 — worth noting so people recognise them on a board. The YMZ284 is a 16-pin cut-down variant with no I/O ports.

Pin 26 is the only pinout difference from the AY-3-8910, where it is the TEST 2 factory pin. Here it is SEL, the master-clock divider select: SEL HIGH uses the input clock as the master clock; SEL LOW divides the input clock by two. Yamaha's datasheet states the pin has an internal pull-up resistor, so leaving it unconnected gives full AY-3-8910 pin compatibility. That is the headline — the swap "just works" in both directions electrically.

Beyond the pinout there are two real behavioural differences worth stating because they affect how music sounds and how software behaves. The envelope generator uses a 5-bit counter instead of the AY's 4-bit one, giving twice the volume steps and a smoother ramp — but it therefore counts twice as fast, which is exactly what pulling SEL low compensates for. And on the AY, unused register bits always read back as 0 even if you wrote a 1; on the YM, registers read back what you wrote. Software that relies on either behaviour can misbehave on the other chip.

  • Check for a clock on pin 22 first. No clock means silence and is usually a board fault.
  • With a clock present, a chip completely silent on all three channels is normally dead.
  • One dead channel out of three is a failed output stage — the chip must be replaced.
  • If music sounds wrong on a YM fitted where an AY belonged, check whether SEL (pin 26) is driven or floating. Floating gives AY-compatible envelope timing.
  • The three analogue outputs are NOT in order: CH B (3), CH A (4), CH C (38).

Datasheets and references

Related chips

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