Pinout diagram
Summary specifications
Full pin reference
| Pin | Name | Group | Direction | Levels | Description |
|---|---|---|---|---|---|
| 1 | VSS | Ground | Power | 0 V | Ground. VCC is pin 40 — the opposite corner. |
| 2 | NC | No Connect | Not connected | No connect | No connect. Do not wire. |
| 3 | CH B | Analog | Output | Analogue audio | Channel B analogue output. Note the order: B on pin 3, A on pin 4, C on pin 38 — not in order and not together. This is the mistake that gets made when wiring the mixer. |
| 4 | CH A | Analog | Output | Analogue audio | Channel A analogue output. |
| 5 | NC | No Connect | Not connected | No connect | No connect. Do not wire. |
| 6 | IOB7 | I/O | Bidirectional | TTL, 0 V / 5 V | Port B bit 7. Port B descends: IOB7 here down to IOB0 on pin 13. |
| 7 | IOB6 | I/O | Bidirectional | TTL, 0 V / 5 V | Port B bit 6. |
| 8 | IOB5 | I/O | Bidirectional | TTL, 0 V / 5 V | Port B bit 5. |
| 9 | IOB4 | I/O | Bidirectional | TTL, 0 V / 5 V | Port B bit 4. |
| 10 | IOB3 | I/O | Bidirectional | TTL, 0 V / 5 V | Port B bit 3. |
| 11 | IOB2 | I/O | Bidirectional | TTL, 0 V / 5 V | Port B bit 2. |
| 12 | IOB1 | I/O | Bidirectional | TTL, 0 V / 5 V | Port B bit 1. |
| 13 | IOB0 | I/O | Bidirectional | TTL, 0 V / 5 V | Port B bit 0. |
| 14 | IOA7 | I/O | Bidirectional | TTL, 0 V / 5 V | Port A bit 7. Port A continues the descent: IOA7 here down to IOA1 on pin 20, then IOA0 wraps around to pin 21 on the other side. |
| 15 | IOA6 | I/O | Bidirectional | TTL, 0 V / 5 V | Port A bit 6. |
| 16 | IOA5 | I/O | Bidirectional | TTL, 0 V / 5 V | Port A bit 5. |
| 17 | IOA4 | I/O | Bidirectional | TTL, 0 V / 5 V | Port A bit 4. |
| 18 | IOA3 | I/O | Bidirectional | TTL, 0 V / 5 V | Port A bit 3. |
| 19 | IOA2 | I/O | Bidirectional | TTL, 0 V / 5 V | Port A bit 2. |
| 20 | IOA1 | I/O | Bidirectional | TTL, 0 V / 5 V | Port A bit 1. |
| 21 | IOA0 | I/O | Bidirectional | TTL, 0 V / 5 V | Port A bit 0. Port A wraps around the bottom of the package onto the other side. |
| 22 | CLOCK | Clock / Timing | Input | TTL clock | Clock input. Typically 1-2 MHz. No clock means silence and is usually a board fault. |
| 23 | /RESET | Control | Input | TTL, active low | Active low. Reset. Clears all registers and silences the chip. |
| 24 | /A9 | Control | Input | TTL, active low | Active low. Address bit 9 — half of the two-pin chip select. The chip responds only when /A9 is LOW and A8 (pin 25) is HIGH. GI prints this pin as "A9" with an overbar; secondary references often print a bare "A9" and lose the polarity. |
| 25 | A8 | Control | Input | TTL, active high | Address bit 8, active HIGH. The other half of the two-pin chip select: /A9 (pin 24) low AND A8 high must both be satisfied. |
| 26 | TEST 2 | No Connect | Not connected | No connect | Factory test pin. Do not connect. On the YM2149 this pin is SEL — the only pinout difference between the two. |
| 27 | BDIR | Control | Input | TTL | Bus Direction. Together with BC1 (pin 29) and BC2 (pin 28) forms the bus-control trio that says whether the current value on DA0-DA7 is a register address, a write, or a read. |
| 28 | BC2 | Control | Input | TTL | Bus Control 2. In most designs BC2 is simply tied high, leaving BDIR and BC1 to do the work. |
| 29 | BC1 | Control | Input | TTL | Bus Control 1. Together with BDIR (pin 27) selects the bus action: inactive, address, write, or read. |
| 30 | DA7 | Data Bus | Bidirectional | TTL, 0 V / 5 V | Data/address bit 7. The multiplexed bus descends: DA7 here down to DA0 on pin 37. The chip is further only selected when DA7-DA4 are low, with DA3-DA0 choosing one of the 16 registers. |
| 31 | DA6 | Data Bus | Bidirectional | TTL, 0 V / 5 V | Data/address bit 6. |
| 32 | DA5 | Data Bus | Bidirectional | TTL, 0 V / 5 V | Data/address bit 5. |
| 33 | DA4 | Data Bus | Bidirectional | TTL, 0 V / 5 V | Data/address bit 4. |
| 34 | DA3 | Data Bus | Bidirectional | TTL, 0 V / 5 V | Data/address bit 3. |
| 35 | DA2 | Data Bus | Bidirectional | TTL, 0 V / 5 V | Data/address bit 2. |
| 36 | DA1 | Data Bus | Bidirectional | TTL, 0 V / 5 V | Data/address bit 1. |
| 37 | DA0 | Data Bus | Bidirectional | TTL, 0 V / 5 V | Data/address bit 0. |
| 38 | CH C | Analog | Output | Analogue audio | Channel C analogue output. Right across the package from CH A and CH B on pins 3 and 4 — not in order and not together. |
| 39 | TEST 1 | No Connect | Not connected | No connect | Factory test pin. Do not connect. |
| 40 | VCC | Power | Power | +5 V | Positive supply. Decouple with 100 nF close to the pin. VSS is pin 1 — the opposite corner. |
Common uses and repair diagnostics
The General Instrument AY-3-8910 is a programmable sound generator with three square-wave tone channels, one noise generator, one envelope generator and two 8-bit parallel ports. The headline trap is the analogue outputs: channel B is on pin 3, channel A on pin 4, and channel C is right across the package on pin 38. B before A, and C nowhere near either — that is the mistake that gets made when wiring the mixer. Everything else on this chip descends: port B runs IOB7 (pin 6) down to IOB0 (pin 13); port A continues IOA7 (14) down to IOA0 (21), wrapping around the bottom of the package onto the other side; the bus runs DA7 (30) down to DA0 (37). Nothing on this chip counts upwards.
The GI AY-3-8910 is a programmable sound generator with three square-wave tone channels, one noise generator, one envelope generator and two 8-bit parallel ports that most designs use for joysticks or the keyboard. Used in the Amstrad CPC (via the 8255 PPI — see that page), the MSX, the ZX Spectrum 128/+2/+3, the Oric, the Vectrex, the Intellivision and a vast amount of arcade hardware.
The headline trap is the analogue outputs: channel B is on pin 3, channel A on pin 4, and channel C is right across the package on pin 38. B before A, and C nowhere near either — that is the mistake that gets made when wiring the mixer. Everything else on this chip descends: port B runs IOB7 (pin 6) down to IOB0 (pin 13); port A continues IOA7 (14) down to IOA0 (21), wrapping around the bottom of the package onto the other side; the bus runs DA7 (30) down to DA0 (37). Nothing on this chip counts upwards.
/A9 (pin 24) and A8 (pin 25) are a two-pin chip select with opposite polarity: the chip responds only when /A9 is LOW and A8 is HIGH. GI prints /A9 as "A9" with an overbar; secondary references often print a bare "A9" and lose the polarity. The chip is further only selected when DA7-DA4 are low, with DA3-DA0 choosing one of the 16 registers. DA0-DA7 is a multiplexed address/data bus; BDIR (27), BC1 (29) and BC2 (28) form the bus-control trio that says whether the current value is a register address, a write, or a read. In most designs BC2 is simply tied high. TEST 1 (39) and TEST 2 (26) are factory test pins — do not connect either. Pins 2 and 5 are no-connects as well, so four of the forty pins should be left alone.
The AY-3-8912 is the same chip in a DIP-28 package with only port A bonded out; it is what the Amstrad CPC actually fits. We do not have its pin table in this library. The YM2149 is Yamaha's licensed version, pin compatible with one pin difference — see that page.
- Check for a clock on pin 22 first. No clock means silence and is usually a board fault, not a dead chip.
- With a clock present, a chip that is completely silent on all three channels is normally dead.
- One dead channel out of three is a failed output stage and is not repairable — the chip must be replaced.
- On a CPC, remember the CPU talks to the AY through the 8255 PPI, so "no sound and no keyboard" points at the 8255, not the AY.
- The three analogue outputs are NOT in order: CH B (3), CH A (4), CH C (38). Check the mixer wiring before condemning the chip.