Pinout diagram
Summary specifications
Full pin reference
| Pin | Name | Group | Direction | Levels | Description |
|---|---|---|---|---|---|
| 1 | D2 | Data Bus | Input | TTL, 0 V / 5 V | Data bit 2. INPUT ONLY — the chip is write-only. Note: D0 is the most significant bit on this chip (TI convention), so "D2" is the third-most-significant bit. The bus is scattered: D2, D1, D0 on pins 1-3, then D7, D6, D5, D4 on pins 10-13, with D3 on its own at pin 15. |
| 2 | D1 | Data Bus | Input | TTL, 0 V / 5 V | Data bit 1. INPUT ONLY. |
| 3 | D0 | Data Bus | Input | TTL, 0 V / 5 V | Data bit 0. INPUT ONLY. This is the MOST significant bit of the byte you write — the opposite of every other chip in this library. That is the data bus warning: published pinouts that disagree with this table have renumbered the bus to modern convention. |
| 4 | READY | Control | Output | TTL, active high | Ready. ACTIVE HIGH — no slash. Goes low to tell the CPU to wait while the chip processes a write. Many designs simply ignore it. |
| 5 | /WE | Control | Input | TTL, active low | Active low. Write Enable. Strobes the data on D0-D7 into the chip. There is no R/W pin because the chip is write-only — nothing to read back. |
| 6 | /CE | Control | Input | TTL, active low | Active low. Chip Enable. TI's datasheet calls this /CE; citylan and several hobby references label the same pin /OE. Note both names. Commonly just tied low. |
| 7 | AUDIO | Analog | Output | Analogue audio | Audio output. Mono. Needs an external amplifier. |
| 8 | GND | Ground | Power | 0 V | Ground. |
| 9 | NC | No Connect | Not connected | No connect | No connect on the SN76489. On the SN76496 this pin is AUDIO IN for mixing — so a SN76496 in an SN76489 socket is fine, but not necessarily the reverse if the board drives pin 9. |
| 10 | D7 | Data Bus | Input | TTL, 0 V / 5 V | Data bit 7. INPUT ONLY. The least significant bit on this chip (TI convention). |
| 11 | D6 | Data Bus | Input | TTL, 0 V / 5 V | Data bit 6. INPUT ONLY. |
| 12 | D5 | Data Bus | Input | TTL, 0 V / 5 V | Data bit 5. INPUT ONLY. |
| 13 | D4 | Data Bus | Input | TTL, 0 V / 5 V | Data bit 4. INPUT ONLY. |
| 14 | CLOCK | Clock / Timing | Input | TTL clock | Clock input. The SN76489 has a divide-by-8 so it can take up to 4 MHz, which let designers reuse the NTSC colour-burst crystal already on the board. The SN76494 and the original TMS9919/SN94624 lack the divider and top out at 500 kHz. |
| 15 | D3 | Data Bus | Input | TTL, 0 V / 5 V | Data bit 3. INPUT ONLY. On its own at pin 15, away from the rest of the bus. |
| 16 | VCC | Power | Power | +5 V | Positive supply. Decouple with 100 nF close to the pin. |
Common uses and repair diagnostics
The Texas Instruments SN76489 is a write-only programmable sound generator with three square-wave tone channels and a noise channel, one mono output on pin 7. The headline — and the single most useful thing anyone can learn about this chip — is that TI numbered this bus so that D0 is the MOST significant bit of the byte you write, the opposite of the Intel and Motorola convention used by every other chip in this library. That is why so many published pinouts look "reversed": their authors renumbered the bus to match modern convention instead of TI's. This page follows TI's own Application Manual. Check which convention any other pinout you find is using before you wire from it.
The TI SN76489 is a write-only programmable sound generator with three square-wave tone channels and a noise channel, one mono output on pin 7. Used in the BBC Micro, the ZX Spectrum 128 (alongside the AY), the Sega Master System and Game Gear (an integrated derivative), the ColecoVision, the TI-99/4A, the Tandy 1000 and the IBM PCjr.
The headline — and the single most useful thing anyone can learn about this chip — is that TI numbered this bus so that D0 is the MOST significant bit of the byte you write, the opposite of the Intel and Motorola convention used by every other chip in this library. That is why so many published pinouts look "reversed": their authors renumbered the bus to match modern convention instead of TI's. This page follows TI's own Application Manual, backed by citylan.it and the maxint-rd working hardware library. One source, majicdesigns, contradicts itself — its ASCII diagram says pin 1 = D5 while its own wiring table says D2 goes to pin 1, agreeing with us. Check which convention any other pinout you find is using before you wire from it.
The data pins are INPUTS ONLY. The chip is write-only; there is nothing to read back, which is why there is no R/W pin — just /WE (5) and /CE (6). The bus is scattered: D2, D1, D0 on pins 1-3, then D7, D6, D5, D4 on pins 10-13, with D3 on its own at pin 15. READY (pin 4) is an OUTPUT, active HIGH — no slash. It goes low to tell the CPU to wait; many designs simply ignore it. Pin 6 is /CE on TI's datasheet (Chip Enable); citylan and several hobby references label the same pin /OE. Note both names. It is commonly just tied low.
The SN76489 added a divide-by-8 so it can take up to 4 MHz, which let designers reuse the NTSC colour-burst crystal already on the board. The SN76494 and the original TMS9919/SN94624 lack the divider and top out at 500 kHz. The SN76496 is functionally the SN76489A plus an AUDIO IN pin on pin 9 (our NC) for mixing — so a SN76496 in an SN76489 socket is fine, but not necessarily the reverse if the board drives pin 9. The SN76489 and SN76489A differ in output polarity: the plain SN76489's waveform is inverted relative to the SN76489A's. Usually inaudible alone, but it matters if you mix its output with another source.
- Check for a clock on pin 14 first. No clock means silence and is usually a board fault.
- Confirm /CE (pin 6) and /WE (pin 5) are being strobed. A chip with a good clock that stays silent on all channels is dead.
- Check for DC on pin 7 (AUDIO) before condemning the chip — a failed coupling capacitor mimics a dead chip.
- Remember D0 is the most significant bit here (TI convention). If writes seem to produce the wrong effect, check that the driving code has not assumed Intel bit ordering.
- READY (pin 4) is active HIGH and goes low to signal wait. Many designs ignore it; if yours uses it, a stuck-low READY will stall the CPU.