Pinout diagram
Summary specifications
Full pin reference
| Pin | Name | Group | Direction | Levels | Description |
|---|---|---|---|---|---|
| 1 | 1A | I/O | Input | CMOS, 0 V / VDD | Gate 1, input A. CMOS inputs are high impedance; never leave unused inputs floating. |
| 2 | 1B | I/O | Input | CMOS, 0 V / VDD | Gate 1, input B. |
| 3 | 1Y | I/O | Output | CMOS push-pull | Gate 1 output. Low only when both 1A and 1B are high. |
| 4 | 2Y | I/O | Output | CMOS push-pull | Gate 2 output. Low only when both 2A and 2B are high. Note: pin 4 is an OUTPUT on the 4011, unlike the 7400 where pin 4 is an input. |
| 5 | 2A | I/O | Input | CMOS, 0 V / VDD | Gate 2, input A. |
| 6 | 2B | I/O | Input | CMOS, 0 V / VDD | Gate 2, input B. |
| 7 | VSS | Ground | Power | 0 V | Negative supply (ground return for all four gates). |
| 8 | 3A | I/O | Input | CMOS, 0 V / VDD | Gate 3, input A. Note: pin 8 is an INPUT on the 4011, unlike the 7400 where pin 8 is an output. |
| 9 | 3B | I/O | Input | CMOS, 0 V / VDD | Gate 3, input B. |
| 10 | 3Y | I/O | Output | CMOS push-pull | Gate 3 output. Low only when both 3A and 3B are high. |
| 11 | 4Y | I/O | Output | CMOS push-pull | Gate 4 output. Low only when both 4A and 4B are high. |
| 12 | 4A | I/O | Input | CMOS, 0 V / VDD | Gate 4, input A. |
| 13 | 4B | I/O | Input | CMOS, 0 V / VDD | Gate 4, input B. |
| 14 | VDD | Power | Power | +3 V to +15 V | Positive supply. Decouple with 100 nF close to the pin. |
Common uses and repair diagnostics
The CD4011 is the 4000-series CMOS quad 2-input NAND gate, and it is one of the great gotchas of the parts catalogue: it does the same logic job as the 74LS00 but it is NOT pin-compatible with it. The 7400 puts its gate outputs on pins 3, 6, 8 and 11; the 4011 puts them on pins 3, 4, 10 and 11. Dropping a 4011 into a board laid out for a 7400 shorts gate outputs onto pins the board drives as inputs, so the two families must never be swapped without rewiring.
The CD4011 does the same NAND-gate jobs as the 74LS00 — address decoding, signal inversion, reset gating — but in circuits that must run from a battery or a wide, unregulated rail. It turns up in 9 V and 12 V control boards, in CMOS logic retrofits of older discrete designs, and in low-power instruments where a TTL part would waste more current than the rest of the board.
The critical thing to know is that the CD4011 is NOT a drop-in replacement for the 74LS00. Both are quad 2-input NAND gates in a 14-pin DIP, both share the same supply pins (7 ground, 14 VCC/VDD), but the gate pin assignments are different: the 7400 puts outputs on 3, 6, 8 and 11, while the 4011 puts them on 3, 4, 10 and 11. Swapping one for the other without rewiring connects gate outputs to pins the board drives as inputs, which can destroy both the chip and whatever is driving those lines. Always check which family a board was designed for before substituting.
The big difference from a 74LS00 in use is the inputs: CMOS pins are essentially open gates, so any unconnected input drifts and the gate oscillates, drawing destructive current. Tie every unused input — on a used gate or a spare one — to VSS or VDD. The CD4011 is also far slower than LS, so it is the wrong choice for anything above a few MHz; for a fast decode, reach for the 74HC00 instead, which is CMOS with TTL-class speeds — but note that the 74HC00 follows the 7400 pinout, not the 4011 pinout, so it is not a drop-in for a 4011 either.
- Confirm pin 14 (VDD) is within 3 to 15 V and pin 7 (VSS) is at 0 V. Overvoltage or reversed rails kill CMOS instantly.
- Before substituting, confirm which family the board was designed for. A 4011 dropped into a 7400 footprint puts gate outputs onto pins 4, 8 and 10 that the board drives as inputs, shorting outputs to driven lines.
- Check every input, including those of spare gates, is tied to a rail. A floating CMOS input reads as an indeterminate voltage and makes the output chatter.
- Measure the output of a driven gate: a CMOS output swings close to both rails. A level stuck halfway usually means an input is floating, not a dead gate.
- Scope the supply at pin 14 while the outputs switch; CMOS draws current spikes on transitions, so a missing decoupling capacitor can reset downstream logic.
- If the chip runs warm, suspect a floating input or an output shorted to another gate — CMOS should draw microamps at rest.